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SEMI  M21
2004-MAR-01 • Active/Current •
GUIDE FOR ASSIGNING ADDRESSES TO RECTANGULAR ELEMENTS IN A CARTESIAN ARRAY
 
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Description:

This guide covers procedures for assigning addresses that can be used to locate and identify rectangular elements in a Cartesian array. The array may be regular or tiled in one direction.

Relating the position of the array to the wafer surface is outside the scope of this guide, but it may be established through use of the wafer coordinate system defined in SEMI M20.

This guide covers procedures for assigning a unique identification (address) for each element in the array. An example of the results obtained by following this procedure are given in Related Information 1. 

The element addressing convention in this guide provides an orderly progression along perpendicular directions with addresses of adjacent elements in any direction differing by 1. Consequently, distances may be calculated in a unified way.

For complex patterns, more than one array on a wafer may be defined and related to the same coordinate axes.

The element addressing convention in this guide is consistent with that of the polar array specified in SEMI M17. In addition, element addresses can be readily transformed to addresses in other types of addressing conventions for Cartesian arrays as described in Related Information 2.

NOTICE: This standard does not purport to address safety issues, if any, associated with its use. It is the responsibility of the users of this standard to establish appropriate safety and health practices and determine the applicability of regulatory or other limitations prior to use.

Purpose

It is frequently very useful to have a standardized method for labeling elements in an array on a silicon wafer surface.

This guide defines an element addressing convention for locating and uniquely identifying rectangular elements in a Cartesian array.

Such arrays are useful in locating sites for site flatness characterization, defect mapping, determination of parametric distributions, etc. on unpatterned semiconductor wafers.




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