This practice covers the analysis of the crystallographic perfection in silicon ingots. The steps described are sample preparation, etching solution selection and use, defect identification, and defect counting.

This practice is suitable for use in evaluating silicon grown in either the [111] or the [100] direction and doped either p or n type with resistivity greater than 0.005 O·cm.

NOTICE: This standard does not purport to address safety issues, if any, associated with its use. It is the responsibility of the user of this standard to establish appropriate safety and health practices and determine the applicability of regulatory or other limitations prior to use.

Purpose

The use of silicon wafers in many semiconductor devices requires a consistent atomic lattice structure. Crystal defects disturb local lattice energy conditions that are the basis for semiconductor behavior. These defects have distinct effects on essential semiconductor device-manufacturing processes such as alloying and diffusion.

This practice provides guidance regarding procedures for analysis of crystal defects of silicon ingots from which silicon wafers are cut.

This practice together with the referenced standards may be used for process control, research and development, and materials acceptance purposes.